Jan 22, 2014
Accurate and Inexpensive Performance Monitoring for Variability-Aware Systems
Liangzhen Lai and Puneet Gupta
Asia and South Pacific Design Automation Conference (ASP-DAC 2014)
Designing reliable integrated systems has become a major challenge with shrinking geometries, increasing fault rates and devices which age substantially in their usage life. The research is motivated by the observation many of the infield failures are delay failures and several variability signatures are also delay-related.

Jan 22, 2014
QED Post-Silicon Validation and Debug: Frequently Asked Questions
David Lin and Subhasish Mitra, Stanford
Asia and South Pacific Design Automation Conference (ASP-DAC 2014)
New systematic techniques are essential to overcome the rising costs of existing post-silicon validation and debug techniques. QED, an acronym for Quick Error Detection, is such a technique that effectively overcomes several post-silicon validation and debug challenges. QED systematically creates a wide variety of validation tests to quickly detect bugs, not only inside processor cores, but also in uncore components (i.e., components in an SoC that are neither processor cores nor co-processors) of multi-core system-on-chips. For this paper, Mitra presented a brief overview of QED through a series of frequently asked questions.

Sep 29, 2013
Cross-Layer Reliability Modeling and Optimization for Embedded Systems under Process Variations
Puneet Gupta, UC Irvine
ESweek (CODES+ISSS), Montreal, Canada
Variability Expedition co-PI Puneet Gupta is giving this tutorial as part of Embedded Systems Week. Other speakers in the session include Muhammad Shafique (Karlsruhe Institute of Technology), Hiren Patel (Univ. of Waterloo) and Siddharth Garg (Univ. of Waterloo).

Sep 25, 2013
Design for Nanoscale Patterning
Puneet Gupta, UCLA
IEEE Custom Integrated Circuits Conference, San Jose, Calif.
Variability co-PI Puneet Gupta of UCLA presents this tutorial to explain how layout and circuit design interact with lithography choices. Lithography technology is rapidly evolving and has started to impose unusual restrictions on design layout. The tutorial will give a brief introduction to current and upcoming lithography technologies. Prof. Gupta will focus especially on multi-patterning technologies such as LELE double patterning and SADP. He will discuss design enablement of multi-patterning technologies, especially in context of cell-based digital designs. Models for electrical impact of lithography imperfections such as polysilicon/active rounding and overlay errors will be outlined. The tutorial will also briefly explore the role of design in lithography technology development.

Sep 24, 2013
Poster: Detection of Early-Life Failures in High-K Metal-Gate Transistors and Ultra Low-K Inter-Metal Dielectrics
Y.M. Kim, J. Seomun, H.-O. Kim, K.-T. Do, J.Y. Choi, K.S. Kim, M. Sauer, B. Becker and S. Mitra
IEEE Custom Integrated Circuits Conference, San Jose, Calif.
This poster will be part of the 5-7pm poster session on Sept. 24 at CICC 2013 in San Jose, Calif.

Sep 2, 2013
Making Error Correcting codes Work for Flash Memory
Lara Dolecek, UCLA
Flash Memory Summit 2013, Santa Clara, Calif.
UCLA's Lara Dolecek gave a 3-hour tutorial on novel coding methods for Flash on Aug. 12 in connection with the Flash Memory Summit. The Variability co-PI's presentation included a discussion of her team's new graded-error correcting codes that outperform state-of-the-art BCH codes. The new codes were developed in part based on the data collection done in Steve Swanson's group at UC San Diego.

May 14, 2013
Variability-Aware Software for Efficient Computing with Nanoscale Devices
Rajesh Gupta et al.
NSF Meeting Expedition Overview
On May 14, PI Rajesh Gupta delivered an overview of the Variability Expedition at a meeting to showcase the work being done on NSF Expeditions in Computing across the country. It took place in Washington, D.C. Click on the link to download the slide deck in PDF format for Gupta's talk on "Variability-Aware Software for Efficient Computing with Nanoscale Devices."
Presentation Materials: Download

Sep 12, 2012
JIT#: Just in Time Load Balancing
Alex Nicolau, UC Irvine
25th International Workshop of Languages and Compilers for Parallel Computing (LCPC 2012)
UC Irvine PI Alex Nicolau delivered an invited talk to LCPC 2012 at Waseda University in Tokyo, Japan, with co-authors R. Cammarota and A. Veidebaum.

Aug 22, 2012
Software Controlled Memories for Scalable Many-Core Architectures
Nikil Dutt
18th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2012)
UC Irvine PI Nikil Dutt delivered a keynote presentation in Seoul, South Korea, in late August at RTCSA 2012.

Jul 19, 2012
Program Optimization for Performance vs. Power Consumption
Alex Nicolau, UC Irvine
Calit2 UC Irvine
Variability co-PI Alex Nicolau presented to the SURF-IT summer research program for undergraduates at Calit2 UC Irvine. He focused on the classification of programs and program optimization for performance versus power consumption.

May 15, 2012
VarEmu: An Emulation-based Testbed for Variability-Aware Software
Lucas Wanner, Gauresh Rane, Puneet Gupta and Mani Srivastava
Variability Expedition Review, San Diego

Mar 8, 2012
Keynote: Robust System Design: Overcoming Complexity and Reliability Challenges
Subhasish Mitra, Stanford University
Synthesis and System Integration of Mixed Information Technologies
SASIMI 2012 took place in Beppu, Japan.

Mar 6, 2012
Tackling Intracell Variability in TLC Flash Through Tensor Product Codes
Ryan Gabrys, UCLA
Non-Volatile Memories Workshop (NVM) 2012
Graduate student Ryan Gabrys delivered this presentation in an NVM session chaired by his co-author and Variability co-PI Lara Dolecek.

Feb 7, 2012
Flexible coding strategies for next-generation storage systems
Lara Dolecek, UCLA
Information Theory and Applications Workshop 2011
UCLA's Lara Dolecek presented joint work with Ryan Gabrys of UCLA, Eitan Yaakobi of Caltech, as well as Laura Grupp and Steven Swanson of UCSD. Click on link for abstract.

Feb 7, 2012
LDPC decoders on unreliable hardware: fundamental limits and practical implications
S.M. Sadegh Tabatabaei Yazdi, Postdoc, UCLA
Information Theory and Applications Workshop 2011
Click on link for abstract of this invited talk delivered at ITA 2011 in San Diego.

Jan 30, 2012
Bug localization techniques for effective post-silicon validation
Subhasish Mitra, Stanford University
IEEE/ACM Asia and South Pacific Design Automation Conference 2012
ASP-DAC 2012 took place in Sydney, Australia.
Presentation Materials: Download