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"Spatially-Aware Adaptive Error Correcting Codes for Flash Memory," R. Gabrys and L. Dolecek. IEEE Asilomar Conference on Signals, Systems and Computers, Nov 15, 2011 "EXIT Chart Analysis and Design of Non-Binary Protograph-Based LDPC Codes," B.-Y. Chang, D. Divsalar and L. Dolecek. IEEE Military Communications Conference (Milcom) 2011, Nov 10, 2011 "Ensemble Analysis of Pseudocodewords of Protograph-Based Non-Binary LDPC Codes," D. Divsalar and L. Dolecek. IEEE Information Theory Workshop 2011, Oct 24, 2011 "AppAdapt: Opportunistic Application Adaptation in Presence of Hardware Variation," A. Pant, P. Gupta and M.v.d. Schaar. IEEE Transactions on VLSI Systems, Oct 18, 2011 "Non-binary WOM Codes for Multilevel Flash Memories," R. Gabrys, E. Yaakobi, L. Dolecek, P. Siegel, A. Vardy, and J. Wolf. IEEE Information Theory Workshop, Oct 16, 2011 "Virtualizing On-Chip Distributed Memories for Low Power, Error-Resilient, Secure Systems-on-Chip," L. Bathen and N. Dutt. Memory Architecture and Organization Workshop (MeAOW) 2011, Oct 13, 2011 "FFT-Cache: A Flexible Fault-Tolerant Cache Architecture for Ultra Low Voltage Operation," A. BanaiyanMofrad, H. Homayoun and N. Dutt. International Conference on Compilers, Architectures and Synthesis of Embedded Systems (CASES) 2011, Oct 10, 2011 "SPMVISOR: Dynamic Scratchpad Memory Virtualization for Secure, Low-Power and High Performance Distributed On-Chip Memories," Luis Bathen, Dongyun Shin, Sung-Soo Lim and Nikil Dutt. International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2011), Oct 9, 2011 "Exploiting Timing Error Resilience in Architecture of Energy-Efficient Processors," J. Sartori and R. Kumar (Best Paper Award). International Conference on Compilers, Architectures and Synthesis of Embedded Systems (CASES) 2011, Oct 9, 2011 "Stochastic Computing Embracing Errors in Architecture and Design of Processors and Applications," John Sartori, Joseph Sloan and Rakesh Kumar. International Conference on Compilers, Architectures and Synthesis of Embedded Systems (CASES), Oct 7, 2011 "Tackling Intercell Variability in TLC Flash Through Error Correction Coding," R. Gabrys, E. Yaakobi, L. Grupp, L. Dolecek, P. Siegel and S. Swanson. Proc., Allerton Conference on Communications, Computing and Control, Sep 29, 2011 "Probabilistic Design of Robust Circuits and Systems," H. Cho, S. Tabatabei, Y. Sun, L. Dolecek and S. Swanson. Allerton Conference 2011, Sep 29, 2011 "Temperature-Aware Dynamic Workload Scheduling in Multisocket CPU Servers," R. Ayoub, K. R. Indukuri and T. S. Rosing. IEEE Trans. in Computer Aided Design of Integrated Circuits and Systems, Vol 30, No 9, Sep 15, 2011 "Algorithmic Techniques for Fault Detection for Sparse Linear Algebra," Joseph Sloan, Rakesh Kumar, Greg Bronevetsky and Tzanio Kolev. SRC TECHCON Conference 2011, Sep 13, 2011 "Dynamic NBTI management using a 45nm multi-degradation sensor," P. Singh, E. Karl, D. Sylvester, and D. Blaauw. IEEE Transactions on Circuits and Systems I, pp. 2026-2037, Sep 1, 2011 |
