Our overall objective is to understand the variability present in solid-state storage devices and developing techniques to mitigate it based on application-level requirements. Toward this end we are characterizing a range of both solid-state drives and discrete flash devices and analytical techniques to understand their reliability behavior. The objectives for the next quarter are to collect and analyze preliminary SSD characterization data and begin devising error management approaches based on the discrete device data we have already collected.

Our team is working on mathematical and statistical models and algorithms for systems experiencing stochastic variations over multiple scales. We are currently working on new coding-theoretic solutions to increase reliability, robustness and longevity of such systems with spatio-temporal variability. This is a part of the architectural design and hardware diagnostics goals. We have proposed several provably good coding schemes that can be used to increase reliability and lifetime of Flash memories. These schemes are based on new ideas drawn from additive number theory, enumerative combinatorics and numerical optimization.

The objectives for the first quarter were to establish provable results for models capturing the intrinsic asymmetry in Flash. While the models are elementary, they have not been studied in the past.

Publications:

"Extracting Device Fingerprints from Flash Memory Exploiting Physical Variations," Pravin Prabhu, Ameen Akel, Laura Grupp, Wing-Key Yu, G. Edward Suh, Edwin Kan, and Steven Swanson. Proceedings of the 4th International Conference on Trust and Trustworthy Computing 2011, 06-22-11

"Understanding the Impact of Power Loss on Flash Memory," Hung-Wei Tseng, Laura M. Grupp and Steven Swanson. 48th Design Automation Conference (DAC 2011), 06-06-11

"Coding Methods for Emerging Non-Volatile Memories," Lara Dolecek, UCLA. Information Theory and Applications Workshop 2011, 02-11-11

"LDPC Absorbing Sets, the Null Space of the Cycle Consistency Matrix, and Tanner's Constructions," Jiadong Wang, Lara Dolecek and Richard Wesel (all UCLA). Information Theory and Applications Workshop 2011, 02-07-11

Plans/Outlook:

Our immediate goals are to widen the scope of our data collection to include additional SSDs and flash chips. We are also constructing several new hardware artifacts (simple boards) to help in power measurement and adapting our existing infrastructure to a wider range of flash devices.

We will continue with the development of provably good coding schemes for spatio-temporal asymmetric channels. These scheme are being developed for novel yet fundamental mathematical models, and in particular have applications in Flash memories. We are also interacting with Swanson group at UCSD to learn what are the appropriate models for the comprehensive data they have. Preliminary theoretical results based on this data look encouraging. We have also started a collaboration with the Mitra group at Stanford regarding algorithmic-based modifications to help increase robustness of architectures implementing probabilistic applications, and with Gupta group at UCLA regarding new statistical techniques for thermal monitoring.

(Top) Threat model for counterfeit detection, from 'Extracting Device Fingerprints from Flash Memory by Exploiting Physical Variations' (see Publications). (Middle) Benefits of new coding schemes when erase operation is costly. Here, naive scheme with randomly ordered operations. (Bottom) Proposed scheme where subsequent writes do not decrement cell value, thus avoiding costly erase operations (marked in red). Proposed scheme is simple to describe mathematically and optimal.

Category:

Measurement / Modeling

Campus:

UCSD

UCLA

People:

PIs: Steven Swanson (UCSD), Lara Dolecek (UCLA); Graduate Students: Ryan Gabrys (UCLA), Laura Grupp, Pravin Prabhu, Hung-Wei Tseng (UCSD)

Artifacts:

We have amassed a significant amount of data on flash memory error patterns. It is not yet suitable for wider consumption (i.e., outside the expedition).