Publications
"Variation-Tolerant OpenMP Tasking on Tightly-Coupled Processor Clusters," Abbas Rahimi, Andrea Marongiu, Paolo Burgio, Rajesh K. Gupta, Luca Benini. ACM/IEEE Design, Automation and Test in Europe (DATE), Mar 22, 2013

"SlackProbe: A low overhead in situ on-line timing slack monitoring methodology," Liangzhen Lai, Vikas Chandra, Robert Aitken, and Puneet Gupta. IEEE/ACM Design, Automation and Test in Europe, Grenoble, France, Mar 18, 2013

"Modeling and Analysis of Fault-tolerant Distributed Memories for Networks-on-Chip," BanaiyanMofrad, G. Girao, and N. Dutt. Proc,. 2013 Conference on Design, Automation and Test in Europe (DATE), Grenoble, France, Mar 18, 2013

"Razor-Lite: A side-channel error detection register for timing margin recovery in 45nm SOI CMOS," S-J. Kim, I. Kwon, D. Fick, M. Kim, Y-P. Chen, and D. Sylvester. IEEE International Solid-State Circuits Conference, San Francisco, CA, Feb 18, 2013

"Variability-Aware Memory Management for Nanoscale Computing," Nikil Dutt, Puneet Gupta, Alex Nicolau, Luis A. D. Bathen, and Mark Gottscho. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), Jan 3, 2013

"A Fault Tolerant Self-Scheduling Scheme for Parallel Loops on Shared Memory Systems," Frank Wang, R. Cammarota, A. Veidenbaum and A. Nicolau. 19th International Conference on High Performance Computing, Dec 21, 2012

"Cross-Layer Virtual Observers for Embedded Multiprocessor System-On-Chip (MPSoC)," S. Sarma, N. Dutt, and N. Venkatasubramanian. Proc. 2012 Workshop on Adaptive Reflexive Middleware at ACM Middleware (ARM 2012), Montreal, Canada, Dec 5, 2012

"Dynamic Threshold Schemes for Multi-Level Non-Volatile Memories," Frederic Sala, Ryan Gabrys, and Lara Dolecek. Proc. IEEE Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, Nov 5, 2012

"ViPZonE: OS-level Memory Variability-Aware Physical Address Zoning for Energy Savings," L. Bathen, M. Gottscho, N. Dutt, P. Gupta, and A. Nicolau.  ACM International Conference on Hardware/Software Codesign and System Synthesis, Oct 18, 2012

"A Novel NoC-based Design for Fault Tolerance of Last-Level Caches in CMPs," G. Girao, A. BanaiyanMofrad and N. Dutt. International Symposium on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2012), Oct 12, 2012

"AVid: Annotation Driven Video Decoding for Hybrid Memories," C. Stancu, L. Bathen, A. Nicolau and N. Dutt. 10th International Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia 2012), Oct 11, 2012

"ViPZonE: OS-level Memory Variability-Aware Physical Address Zoning for Energy Savings," L. Bathen, M. Gottscho, N. Dutt, P. Gupta, and A. Nicolau. Proc. ACM International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Tampere, Finland, Oct 8, 2012

"JIT#: Just in Time Load Balancing," R. Cammarota, A. Nicolau and A. Veidebaum. 25th International Workshop on Languages and Compilers for Parallel Computing, Sep 12, 2012

"Software Controlled Memories for Scalable Many-Core Architectures," L. Bathen and N. Dutt. 18th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2012), Aug 22, 2012

"Procedure Hopping: a Low Overhead Solution to Mitigate Variability in Shared-L1 Processor Clusters," Abbas Rahimi, Luca Benini, Rajesh K. Gupta. ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED), Jul 30, 2012