Publications
"Dynamic Threshold Schemes for Multi-Level Non-Volatile Memories," Frederic Sala, Ryan Gabrys, and Lara Dolecek. Proc. IEEE Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, Nov 5, 2012

"ViPZonE: OS-level Memory Variability-Aware Physical Address Zoning for Energy Savings," L. Bathen, M. Gottscho, N. Dutt, P. Gupta, and A. Nicolau.  ACM International Conference on Hardware/Software Codesign and System Synthesis, Oct 18, 2012

"A Novel NoC-based Design for Fault Tolerance of Last-Level Caches in CMPs," G. Girao, A. BanaiyanMofrad and N. Dutt. International Symposium on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2012), Oct 12, 2012

"AVid: Annotation Driven Video Decoding for Hybrid Memories," C. Stancu, L. Bathen, A. Nicolau and N. Dutt. 10th International Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia 2012), Oct 11, 2012

"ViPZonE: OS-level Memory Variability-Aware Physical Address Zoning for Energy Savings," L. Bathen, M. Gottscho, N. Dutt, P. Gupta, and A. Nicolau. Proc. ACM International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Tampere, Finland, Oct 8, 2012

"JIT#: Just in Time Load Balancing," R. Cammarota, A. Nicolau and A. Veidebaum. 25th International Workshop on Languages and Compilers for Parallel Computing, Sep 12, 2012

"Software Controlled Memories for Scalable Many-Core Architectures," L. Bathen and N. Dutt. 18th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2012), Aug 22, 2012

"Procedure Hopping: a Low Overhead Solution to Mitigate Variability in Shared-L1 Processor Clusters," Abbas Rahimi, Luca Benini, Rajesh K. Gupta. ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED), Jul 30, 2012

"Tackling Intracell Variability in TLC Flash Through Tensor Product Codes," Ryan Gabrys, Eitan Yaakobi, Laura Grupp, Steven Swanson, Lara Dolecek. International Symposium on Information Theory 2012, Jul 1, 2012

"An Adaptive Write Word-Line Pulse Width and Voltage Modulation Architecture for Bit-Interleaved 8T SRAMs Daeyeon Kim," Daeyeon Kim, Vikas Chandra, Robert Aitken, David Blaauw, Dennis Sylvester. ACM/IEEE International Symposium on Low Power Electronics Design 2012, Jul 1, 2012

"Algorithmic Approaches to Low Overhead Fault Detection for Sparse Linear Algebra.," Joseph Sloan, Rakesh Kumar, Greg Bronevetsky and Tzanio Kolev. 42nd IEEE/IFIP International Conference on Dependable Systems and Networks (DSN) 2012, Jun 25, 2012

"Power Variability in Contemporary DRAMs," M. Gottscho, A. A. Kagalwalla, and P. Gupta. IEEE Embedded Systems Letters, Jun 15, 2012

"Verifying GPU Kernels by Test Amplification," Alan Leung, Manish Gupta, Yuvraj Agarwal, Rajesh Gupta, Ranjit Jhala and Sorin Lerner. Conference on Programming Language Design and Implementation (PLDI) 2012, Jun 11, 2012

"ERSA: Error Resilient System Architecture for Probabilistic Applications," H. Cho, L. Leem and S. Mitra. IEEE Trans. Computer-Aided Design, Jun 11, 2012

"Probabilistic Analysis of Gallager B Faulty Decoder," S. M. Sadegh Tabatabaei Yazdi, H. Cho, Y. Sun, S. Mitra, and L. Dolecek. IEEE International Conference on Communications (ICC) Emerging Data Storage Technologies, 2012, Jun 10, 2012